drm/i915/guc: Extend deregistration fence to schedule disable
authorMatthew Brost <matthew.brost@intel.com>
Wed, 21 Jul 2021 21:50:53 +0000 (14:50 -0700)
committerJohn Harrison <John.C.Harrison@Intel.com>
Thu, 22 Jul 2021 17:07:17 +0000 (10:07 -0700)
commit1f5cdb06b1d3ea6238c807acd91e5ec59f1098d3
tree92cbee1ab97215f9bf8bd500dbbf2a6003255669
parentb8b183abca5108ad67b0b9e23b6d407347bc4aa8
drm/i915/guc: Extend deregistration fence to schedule disable

Extend the deregistration context fence to fence whne a GuC context has
scheduling disable pending.

v2:
 (John H)
  - Update comment why we check the pin count within spin lock

Cc: John Harrison <john.c.harrison@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <john.c.harrison@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721215101.139794-11-matthew.brost@intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c