clk: renesas: cpg-mssr: Add support to restore core clocks during resume
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 21 Jun 2017 20:24:15 +0000 (22:24 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 20 Oct 2017 09:15:33 +0000 (11:15 +0200)
commit1f4023cdd1bdbe6cb01d0b2cbd1f46207189e3cf
tree722b66d177d78224d334f2c170d775fc151a06c0
parent560869100b99a3daea329efce738a3b7ae357be8
clk: renesas: cpg-mssr: Add support to restore core clocks during resume

On R-Car Gen3 systems, PSCI system suspend powers down the SoC, possibly
losing clock configuration.  Hence add a notifier chain that can be used
by core clocks to save/restore clock state during system suspend/resume.

The implementation of the actual clock state save/restore operations is
clock-specific, and to be registered with the notifier chain in the SoC
or family-specific cpg_mssr_info.cpg_clk_register() callback.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
drivers/clk/renesas/rcar-gen2-cpg.c
drivers/clk/renesas/rcar-gen2-cpg.h
drivers/clk/renesas/rcar-gen3-cpg.c
drivers/clk/renesas/rcar-gen3-cpg.h
drivers/clk/renesas/renesas-cpg-mssr.c
drivers/clk/renesas/renesas-cpg-mssr.h