cxgb4: Add support to catch bits set in INT_CAUSE5
authorRahul Kundu <rahul.kundu@chelsio.com>
Wed, 25 Mar 2020 11:53:09 +0000 (04:53 -0700)
committerDavid S. Miller <davem@davemloft.net>
Wed, 25 Mar 2020 19:22:33 +0000 (12:22 -0700)
commit1f074e677a343afcd852af5ee725bacc937fa6bd
treef6c5e142505f5bb73228d6a9fdbae9492bb80858
parent6e22c60480aa849d9e6a3f74c6e6df343d87e88d
cxgb4: Add support to catch bits set in INT_CAUSE5

This commit adds support to catch any bits set in SGE_INT_CAUSE5 for Parity Errors.
F_ERR_T_RXCRC flag is used to ignore that particular bit as it is not considered as fatal.
So, we clear out the bit before looking for error.
This patch now read and report separately all three registers(Cause1, Cause2, Cause5).
Also, checks for errors if any.

Signed-off-by: Raju Rangoju <rajur@chelsio.com>
Signed-off-by: Rahul Kundu <rahul.kundu@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h