MIPS: smp-mt: Use CPU interrupt controller IPI IRQ domain support
authorPaul Burton <paul.burton@imgtec.com>
Thu, 30 Mar 2017 19:06:12 +0000 (12:06 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 12 Apr 2017 21:13:13 +0000 (23:13 +0200)
commit1eed40043579608e16509c43eeeb3a53a8a42378
treee52aeb25049d008647b3144ab33b144475b80f42
parent3838a547fda22a37faab5770d01acd72aaeabbf6
MIPS: smp-mt: Use CPU interrupt controller IPI IRQ domain support

Remove the smp-mt IPI code that supported single-core multithreaded
systems and instead make use of the IPI IRQ domain support provided by
the MIPS CPU interrupt controller driver. This removes some less than
nice code, the horrible split between arch & board code and the
duplication that led to within board code.

The lantiq portion of this patch has only been compile tested. Malta has
been tested & is functional.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15837/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/smp-mt.c
arch/mips/lantiq/irq.c
arch/mips/mti-malta/malta-int.c