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(parent: 2903a9b) | patch
[X86] Add new patterns for masked scalar load/store to match clang's codegen from...
authorCraig Topper <craig.topper@intel.com>
Thu, 10 May 2018 21:49:16 +0000 (21:49 +0000)
committerCraig Topper <craig.topper@intel.com>
Thu, 10 May 2018 21:49:16 +0000 (21:49 +0000)
commit1ee19ae126291314d047c0032a04549f222dbc96
treeb52a7999039d480fb5b7a529899d8b8975fdbc32tree | snapshot
parent2903a9bb0201fdb56da3e102bb5de917f16583b0commit | diff
[X86] Add new patterns for masked scalar load/store to match clang's codegen from r331958.

Clang's codegen now uses 128-bit masked load/store intrinsics in IR. The backend will widen to 512-bits on AVX512F targets.

So this patch adds patterns to detect codegen's widening and patterns for AVX512VL that don't get widened.

We may be able to drop some of the old patterns, but I leave that for a future patch.

llvm-svn: 332049
llvm/lib/Target/X86/X86InstrAVX512.td diff | blob | history
llvm/test/CodeGen/X86/avx512-load-store.ll diff | blob | history
Domain: System / Toolchain;