[PowerPC] Support extended mnemonics mffprwz etc.
authorJinsong Ji <jji@us.ibm.com>
Thu, 29 Aug 2019 21:53:59 +0000 (21:53 +0000)
committerJinsong Ji <jji@us.ibm.com>
Thu, 29 Aug 2019 21:53:59 +0000 (21:53 +0000)
commit1ed7d2119ee2bb5b7cc1368d739b13f5ce0692da
tree5fe222784da166e4de49bdeddacdd6de3a13538a
parent04e657be2875f981811e5df4d294a06f7190422d
[PowerPC] Support extended mnemonics mffprwz etc.

Summary:
Reported in https://github.com/opencv/opencv/issues/15413.

We have serveral extended mnemonics for Move To/From Vector-Scalar Register Instructions
eg: mffprd,mtfprd etc.

We only support one of them, this patch add the others.

Reviewers: nemanjai, steven.zhang, hfinkel, #powerpc

Reviewed By: hfinkel

Subscribers: wuzish, qcolombet, hiraditya, kbarton, MaskRay, shchenz, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66963

llvm-svn: 370411
22 files changed:
llvm/lib/Target/PowerPC/P9InstrResources.td
llvm/lib/Target/PowerPC/PPCInstrVSX.td
llvm/test/CodeGen/PowerPC/bitcasts-direct-move.ll
llvm/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
llvm/test/CodeGen/PowerPC/direct-move-profit.ll
llvm/test/CodeGen/PowerPC/fp-int-conversions-direct-moves.ll
llvm/test/CodeGen/PowerPC/fp64-to-int16.ll
llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll
llvm/test/CodeGen/PowerPC/inlineasm-extendedmne.ll [new file with mode: 0644]
llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
llvm/test/CodeGen/PowerPC/pr26180.ll
llvm/test/CodeGen/PowerPC/pr31144.ll
llvm/test/CodeGen/PowerPC/select-addrRegRegOnly.ll
llvm/test/CodeGen/PowerPC/setrnd.ll
llvm/test/CodeGen/PowerPC/store_fptoi.ll
llvm/test/CodeGen/PowerPC/uint-to-fp-v4i32.ll
llvm/test/CodeGen/PowerPC/uint-to-ppcfp128-crash.ll
llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
llvm/test/MC/Disassembler/PowerPC/vsx.txt
llvm/test/MC/PowerPC/vsx.s