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(parent: de1b5c9) | patch
[DAG] matchRotateSub - set demanded bits to the shift amount type size, not the shift...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 26 Jul 2022 16:58:08 +0000 (17:58 +0100)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 26 Jul 2022 16:58:51 +0000 (17:58 +0100)
commit1ea7b9c6ee6420dd6e87489534f44b92e1b6f220
tree69dfe17b6ed52cb3b339678aa7ef7ce79b5c3c74tree | snapshot
parentde1b5c91453fb9fc65b931a9afa53c8d407f8460commit | diff
[DAG] matchRotateSub - set demanded bits to the shift amount type size, not the shift result size.

This should fix a report on D130251 of an assert due to a bitwidth mismatch in APInt::isSubSetOf
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff | blob | history
Domain: System / Toolchain;