clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Tue, 26 Jul 2022 21:01:08 +0000 (23:01 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 22 Aug 2022 07:47:06 +0000 (09:47 +0200)
commit1e56ebc9872feb2cf9a002c0a23d79a68f6493cb
tree5187a0a2081f27d3b681eab13bf92f188be4b657
parent32fb5425547bae46c0d61ec01de1422ffe6d4758
clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220726210110.1444-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a779f0-cpg-mssr.c