projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8c5aead) | patch
[RISCV] Add CMOV isel pattern for (select (setgt X, -1), Y, Z)
authorCraig Topper <craig.topper@sifive.com>
Sat, 5 Mar 2022 06:33:16 +0000 (22:33 -0800)
committerCraig Topper <craig.topper@sifive.com>
Sat, 5 Mar 2022 06:35:13 +0000 (22:35 -0800)
commit1e569e3b7b594f1e69dc5963b6ee4d821e7c68fb
treeb9535ee9135097fad1ca2eaaa0b7495e78e447aftree | snapshot
parent8c5aead28df9e142a604bf6dbbb0f7e00099b71acommit | diff
[RISCV] Add CMOV isel pattern for (select (setgt X, -1), Y, Z)

setgt X, -1 is the canonical form of setge X, 0. We can swap the
select operands and use setlt X, X0 when selecting CMOV. This
avoid materializing the -1 in a register.
llvm/lib/Target/RISCV/RISCVInstrInfoZb.td diff | blob | history
llvm/test/CodeGen/RISCV/select-cc.ll diff | blob | history
Domain: System / Toolchain;