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author	Xiang1 Zhang <xiang1.zhang@intel.com>
	Thu, 17 Dec 2020 04:12:01 +0000 (20:12 -0800)
committer	Xiang1 Zhang <xiang1.zhang@intel.com>
	Thu, 17 Dec 2020 04:12:33 +0000 (20:12 -0800)
commit	1e42ad9d629157a9bba53d3c216e3182bcb1408f
tree	b50506872aedcf31506f735c8db7b98e3a8eac49	tree \| snapshot
parent	a5e4a513b0410c7ebafc7b8cc00903220536f555	commit \| diff

Revert "[Debugify] Support checking Machine IR debug info"

This reverts commit 50aaa8c274910d78d7bf6c929a34fe58b1f45579.

16 files changed:

llvm/docs/HowToUpdateDebugInfo.rst		diff \| blob \| history
llvm/include/llvm/CodeGen/Passes.h		diff \| blob \| history
llvm/include/llvm/CodeGen/TargetPassConfig.h		diff \| blob \| history
llvm/include/llvm/InitializePasses.h		diff \| blob \| history
llvm/lib/CodeGen/CMakeLists.txt		diff \| blob \| history
llvm/lib/CodeGen/CodeGen.cpp		diff \| blob \| history
llvm/lib/CodeGen/MachineCheckDebugify.cpp	[deleted file]	blob \| history
llvm/lib/CodeGen/MachineDebugify.cpp		diff \| blob \| history
llvm/lib/CodeGen/TargetPassConfig.cpp		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/constant-mir-debugify.mir		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/phi-mir-debugify.mir		diff \| blob \| history
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables-x.mir	[deleted file]	blob \| history
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.ll	[deleted file]	blob \| history
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir	[deleted file]	blob \| history
llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir		diff \| blob \| history
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn		diff \| blob \| history

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