PCI: designware: Split Exynos and i.MX bindings

PCI: designware: Split Exynos and i.MX bindings

The glue around the core designware IP is significantly different between
the Exynos and i.MX implementation, which is reflected in the DT bindings.

This changes the i.MX6 binding to reuse as much as possible from the common
designware binding and removes old cruft.

I removed the optional GPIOs with the following reasoning:
- disable-gpio: endpoint specific GPIO, not currently wired up in any code.
  Should be handled by the PCI device driver, not the host controller
  driver.
- wake-up-gpio: same as above.
- power-on-gpio: No user in any upstream DT.  This should be handled by a
  regulator which shouldn't be controlled by the host driver, but rather by
  the PCI device driver.

[bhelgaas: whitespace fixes]
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>