clk: versal: Enable only GATE type clocks
authorT Karthik Reddy <t.karthik.reddy@xilinx.com>
Tue, 28 Sep 2021 06:00:27 +0000 (11:30 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 30 Sep 2021 10:30:28 +0000 (12:30 +0200)
commit1db1acbb848ef1b10eccedb52edd6c37078bbd38
tree73edeb47896e717c19fc707658574b2a43224e1f
parent0285d75a930f4b4d535b9d03972bdfa28e973083
clk: versal: Enable only GATE type clocks

Clocks should be enabled or disabled only if they are of GATE type
clocks. If they are not of GATE type clocks, don't touch them.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1632808827-6109-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/clk/clk_versal.c