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drm/i915/dg2: add TRANS_DP2_VFREQHIGH and TRANS_DP2_VFREQLOW
authorJani Nikula <jani.nikula@intel.com>
Mon, 23 Aug 2021 16:18:10 +0000 (19:18 +0300)
committerJani Nikula <jani.nikula@intel.com>
Tue, 24 Aug 2021 08:02:31 +0000 (11:02 +0300)
commit1db18260f15315e206469391d5b5e3427be55ad3
tree3673431cbe55baa472996a95f06e364d38df7a21tree | snapshot
parent59821ed9c4a63de051042d71526d7bb4eac0617bcommit | diff
drm/i915/dg2: add TRANS_DP2_VFREQHIGH and TRANS_DP2_VFREQLOW

Add the registers for specifying the lower and higher 24 bits of the DP
2.0 pixel clock frequency in Hz.

Bspec: 53326
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9047f10318a30bc03ce8516ee3f5512437a95663.1629735412.git.jani.nikula@intel.com
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
Domain: System / Kernel;