bpf, arm: Fix register clobbering in div/mod implementation
authorJohan Almbladh <johan.almbladh@anyfinetworks.com>
Tue, 28 Sep 2021 09:13:10 +0000 (11:13 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 13 Oct 2021 08:04:26 +0000 (10:04 +0200)
commit1d8f4447e8c442f8d2aeabfd3653957015043179
treeef38cd4dfce56c358a48d285de5ae48e1dbbbcbc
parent29a19eaeb29d57f4576cf57ccac5a2740f1384db
bpf, arm: Fix register clobbering in div/mod implementation

[ Upstream commit 79e3445b38e0cab94264a3894c0c3d57c930b97e ]

On ARM CPUs that lack div/mod instructions, ALU32 BPF_DIV and BPF_MOD are
implemented using a call to a helper function. Before, the emitted code
for those function calls failed to preserve caller-saved ARM registers.
Since some of those registers happen to be mapped to BPF registers, it
resulted in eBPF register values being overwritten.

This patch emits code to push and pop the remaining caller-saved ARM
registers r2-r3 into the stack during the div/mod function call. ARM
registers r0-r1 are used as arguments and return value, and those were
already saved and restored correctly.

Fixes: 39c13c204bb1 ("arm: eBPF JIT compiler")
Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/net/bpf_jit_32.c