[X86][AVX] Use extract_subvector to reduce vector op widths (PR36761)
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 19 Jul 2018 21:52:06 +0000 (21:52 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 19 Jul 2018 21:52:06 +0000 (21:52 +0000)
commit1d181bc992a4a037e6af47a94068932540d29040
tree1df74272c7f8ab6fdf4555fd11f9c0b9a84b077c
parent8e75de21002f104e4c328b5f43cc031fcb48f45f
[X86][AVX] Use extract_subvector to reduce vector op widths (PR36761)

We have a number of cases where we fail to reduce vector op widths, performing the op in a larger vector and then extracting a subvector. This is often because by default it would create illegal types.

This peephole patch attempts to handle a few common cases detailed in PR36761, which typically involved extension+conversion to vX2f64 types.

Differential Revision: https://reviews.llvm.org/D49556

llvm-svn: 337500
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
llvm/test/CodeGen/X86/trunc-subvector.ll
llvm/test/CodeGen/X86/vec_fpext.ll
llvm/test/CodeGen/X86/vec_int_to_fp.ll