drm/vc4: hdmi: Allow DBLCLK modes even if horz timing is odd.
authorDave Stevenson <dave.stevenson@raspberrypi.com>
Thu, 27 Jan 2022 13:51:16 +0000 (14:51 +0100)
committerMaxime Ripard <maxime@cerno.tech>
Thu, 3 Feb 2022 15:07:59 +0000 (16:07 +0100)
commit1d118965965f89948236ebe23072bb1fca5e7832
tree23b0847da3ac3112f7a34eb58195d8a3157f0e82
parent71702c495b78dfbc22eeac32ea9cda452862750d
drm/vc4: hdmi: Allow DBLCLK modes even if horz timing is odd.

The 2711 pixel valve can't produce odd horizontal timings, and
checks were added to vc4_hdmi_encoder_atomic_check and
vc4_hdmi_encoder_mode_valid to filter out/block selection of
such modes.

Modes with DRM_MODE_FLAG_DBLCLK double all the horizontal timing
values before programming them into the PV. The PV values,
therefore, can not be odd, and so the modes can be supported.

Amend the filtering appropriately.

Fixes: 57fb32e632be ("drm/vc4: hdmi: Block odd horizontal timings")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220127135116.298278-1-maxime@cerno.tech
drivers/gpu/drm/vc4/vc4_hdmi.c