drm/i915: Clear DP M2/N2 when not doing DRRS
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 28 Jan 2022 10:37:53 +0000 (12:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 1 Feb 2022 09:33:23 +0000 (11:33 +0200)
commit1d06c820b2b7ceb38bdf0775fac495db4ad4d10e
tree91a755bbd328d06db47d352f6566c643be5c9d36
parent6d6c932daef5c5b3cd5e3692e79507d2a3306031
drm/i915: Clear DP M2/N2 when not doing DRRS

Make life simpler by always programming DP M2/N2 with a consistent
value. This will lets use do state readout+chec unconditionally.

I was first going to just set M2/N2=M1/N1 but then it occurred
to me that it might interfere with fastboot on account of BIOS
likely leaving the registers zeroed. So let's zero out the values
instead (except TU where a zero register value actually means '1').
Still not sure that's the best approach but lets go with it for
now.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220128103757.22461-14-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_display.h
drivers/gpu/drm/i915/display/intel_drrs.c