clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 7 May 2020 07:47:13 +0000 (09:47 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 24 Jun 2020 15:50:14 +0000 (17:50 +0200)
commit1cdae7bb4221fb1a886efd2c75b54a3b1a2cb87f
tree80476ba2da34be8aed679d6249f3e6860273ee49
parent14c5e25d3b00a72782a6cfbb39da09c6579e7579
clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling

[ Upstream commit ace342097768e35fd41934285604fa97da1e235a ]

On SoCs with Standby Control Registers (STBCRs) instead of Module Stop
Control Registers (MSTPCRs), the suspend handler saves the wrong
registers, and the resume handler prints the wrong register in an error
message.

Fortunately this cannot happen yet, as the suspend/resume code is used
on PSCI systems only, and systems with STBCRs (RZ/A1 and RZ/A2) do not
use PSCI.  Still, it is better to fix this, to avoid this becoming a
problem in the future.

Distinguish between STBCRs and MSTPCRs where needed.  Replace the
useless printing of the virtual register address in the resume error
message by printing the register index.

Fixes: fde35c9c7db5732c ("clk: renesas: cpg-mssr: Add R7S9210 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200507074713.30113-1-geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/clk/renesas/renesas-cpg-mssr.c