RISC-V: Add reference to Zve32*
authorTsukasa OI <research_trasio@irq.a4lg.com>
Fri, 11 Aug 2023 03:09:58 +0000 (03:09 +0000)
committerTsukasa OI <research_trasio@irq.a4lg.com>
Fri, 11 Aug 2023 13:27:51 +0000 (13:27 +0000)
commit1c450dc2e7626eb7643e5a370b4d5fe3b10f34ed
tree082a3a5580aef2a3f81cea47e459c90873512666
parent2db20b97f1dc3e5dce3d6ed74a8a62f0dede8c80
RISC-V: Add reference to Zve32*

Before actual vlen handling, this commit fixes its description to allow vlen
less than 16 (but 4 or greater), to support vector subset extensions for
embedded environment ('Zve32*').
gdb/arch/riscv.h