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Recommit "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f"
authorCraig Topper <craig.topper@sifive.com>
Fri, 18 Dec 2020 19:17:09 +0000 (11:17 -0800)
committerCraig Topper <craig.topper@sifive.com>
Fri, 18 Dec 2020 19:19:05 +0000 (11:19 -0800)
commit1c3a6671c25ea72dcc241fde9313daa31d320fed
tree789bde4cfdfbe8535e06efc59ec1825ce5eb5547tree | snapshot
parentcd3e8118648f6fd6894e7d38cf0a0750488e8caccommit | diff
Recommit "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f"

This time with tests.

Original message:
Similar to D93365, but for floating point. No need for special ISD opcodes
though. We can directly isel these from intrinsics. I had to use anyfloat_ty
instead of anyvector_ty in the intrinsics to make LLVMVectorElementType not
crash when imported into the -gen-dag-isel tablegen backend.

Differential Revision: https://reviews.llvm.org/D93426
llvm/include/llvm/IR/IntrinsicsRISCV.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoV.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td diff | blob | history
llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll [new file with mode: 0644] blob
Domain: System / Toolchain;