spi: tegra210-quad: combined sequence mode
authorKrishna Yarlagadda <kyarlagadda@nvidia.com>
Mon, 7 Mar 2022 16:55:18 +0000 (22:25 +0530)
committerMark Brown <broonie@kernel.org>
Tue, 8 Mar 2022 12:28:05 +0000 (12:28 +0000)
commit1b8342cc4a387933780c50f0cf51c94455be7d11
tree3110a8c4a012f12a5f707ce43561379c41931922
parent75a1b44a54bd97500e524cf42e8c81cc632672b3
spi: tegra210-quad: combined sequence mode

Add combined sequence mode supported by Tegra QSPI controller.
For commands which contain cmd, addr, data parts to it, controller
can accept all 3 transfers at once and avoid interrupt for each
transfer. This would improve read & write performance.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20220307165519.38380-3-kyarlagadda@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-tegra210-quad.c