projects / platform / upstream / gcc.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: d6c1846) | patch
RISC-V: Add vssub.vx C API tests
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Sun, 5 Feb 2023 08:21:19 +0000 (16:21 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Sun, 12 Feb 2023 02:59:23 +0000 (10:59 +0800)
commit1b7f3e20a2f405d95b89c5e7893cd2ec0809e666
tree3d24669f6545a8a1301c7a682499f3a27c5b1975tree | snapshot
parentd6c18465cbb17b177613f99bdeba5679bb048884commit | diff
RISC-V: Add vssub.vx C API tests

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vssub_vx_m_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_m_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_m_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_m_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_m_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_m_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tum_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tum_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tum_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tum_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tum_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tum_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tumu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tumu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tumu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tumu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tumu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vssub_vx_tumu_rv64-3.c: New test.
36 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_m_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_m_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_m_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_m_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_m_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_m_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tum_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tum_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tum_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tum_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tum_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tum_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tumu_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tumu_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tumu_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tumu_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tumu_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssub_vx_tumu_rv64-3.c [new file with mode: 0644] blob
Domain: System / Toolchain;