drm/i915: Add TigerLake bandwidth checking
authorStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Fri, 20 Sep 2019 08:37:54 +0000 (11:37 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 24 Sep 2019 12:45:12 +0000 (15:45 +0300)
commit1b74d46782d0615dace4729c22d1862a0355b124
tree6a7ee6c07c8dfc5f641ad36548461b0eba130902
parent5028851cdfdf78dc22eacbc44a0ab0b3f599ee4a
drm/i915: Add TigerLake bandwidth checking

Added bandwidth calculation algorithm and checks,
similar way as it was done for ICL, some constants
were corrected according to BSpec 53998.

v2: Start using same icl_get_bw_info function to avoid
    code duplication. Moved mpagesize to memory info
    related structure as it is now dependent on memory type.
    Fixed qi.t_bl field assignment.

v3: Removed mpagesize as unused. Duplicate code and redundant blankline
    fixed.

v4: Changed ordering of IS_GEN checks as agreed. Minor commit
    message fixes.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111600
Reviewed-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190920083754.5920-1-stanislav.lisovskiy@intel.com
drivers/gpu/drm/i915/display/intel_bw.c