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[AArch64] Add FeatureSlowMisaligned128Store to Exynos M1 and M2
authorEvandro Menezes <e.menezes@samsung.com>
Fri, 16 Dec 2016 00:18:00 +0000 (00:18 +0000)
committerEvandro Menezes <e.menezes@samsung.com>
Fri, 16 Dec 2016 00:18:00 +0000 (00:18 +0000)
commit1b48bac3300d440e6a2772f6feda40680d61729c
tree7f9868cd01744bb7af9cc5bac789387f64c06971tree | snapshot
parentff1302c1622ef08040c4b0f5a7c32da53e966804commit | diff
[AArch64] Add FeatureSlowMisaligned128Store to Exynos M1 and M2

This feature now gates such stores after r289845.  Thus the Exynos
processors now need this feature.

llvm-svn: 289898
llvm/lib/Target/AArch64/AArch64.td diff | blob | history
Domain: System / Toolchain;