Ensure we don't underestimate the code size for 4 byte SSE instruction. (dotnet/coreclr#24555)
* Ensure the code size estimate for emitIns_R_S is correct for 4 byte SSE instruction.
* Centralizing the Is4ByteSSEInstruction size adjustment handling
* Removing unnecessary calls to emitGetVexPrefixAdjustedSize
* Ensure all registers are checked against IsExtendedReg
* Ensure that the ival size is correct for SSE/AVX instructions
* Applying formatting patch
* Ensure all cases for emitIns_R_R_I are covered
* Fixing a inst_RV_RV_IV call to ensure ival fits in a byte
* Centralize some more checks into emitGetAdjustedSize
* Applying formatting patch
Commit migrated from https://github.com/dotnet/coreclr/commit/
a3e43d62917bb542e1adda0a06684061ef77067f