[ARM] Generate [SU]HADD from ((a + b) >> 1)
authorPetre-Ionut Tudor <petre-ionut.tudor@arm.com>
Tue, 14 Jul 2020 14:49:14 +0000 (15:49 +0100)
committerPetre-Ionut Tudor <petre-ionut.tudor@arm.com>
Tue, 21 Jul 2020 12:22:07 +0000 (13:22 +0100)
commit1af9fc82132da7c876e8f70c4e986cc9c59010ee
tree717afab481bcad44fd0a612fb9594aa898197c89
parent5c15426d7c62aa8c38547144f28c5a1c6e50549a
[ARM] Generate [SU]HADD from ((a + b) >> 1)

Summary:
Teach LLVM to recognize the above pattern, where the operands are
either signed or unsigned types.

Subscribers: kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83777
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/test/CodeGen/AArch64/arm64-vhadd.ll