RISC-V: add non-alternative fallback for riscv_has_extension_[un]likely()
authorConor Dooley <conor.dooley@microchip.com>
Fri, 24 Mar 2023 10:05:38 +0000 (10:05 +0000)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 29 Mar 2023 18:48:38 +0000 (11:48 -0700)
commit1aa866931b8026a0dd636e9ef7b5c5dfb4cc5ce8
treedbd6235dea94a7589f8e79a666dcefd87ef8004f
parentfe15c26ee26efa11741a7b632e9f23b01aca4cc6
RISC-V: add non-alternative fallback for riscv_has_extension_[un]likely()

The has_fpu() check, which in turn calls riscv_has_extension_likely(),
relies on alternatives to figure out whether the system has an FPU.
As a result, it will malfunction on XIP kernels, as they do not support
the alternatives mechanism.

When alternatives support is not present, fall back to using
__riscv_isa_extension_available() in riscv_has_extension_[un]likely()
instead stead, which handily takes the same argument, so that kernels
that do not support alternatives can accurately report the presence of
FPU support.

Fixes: 702e64550b12 ("riscv: fpu: switch has_fpu() to riscv_has_extension_likely()")
Link: https://lore.kernel.org/all/ad445951-3d13-4644-94d9-e0989cda39c3@spud/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Jason A. Donenfeld <Jason@zx2c4.com>
Link: https://lore.kernel.org/r/20230324100538.3514663-2-conor.dooley@microchip.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/hwcap.h