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(parent: f4cc757) | patch
[RISCV][VP] Add RVV codegen for vp.trunc.
authorjacquesguan <Jianjian.Guan@streamcomputing.com>
Tue, 12 Apr 2022 09:34:40 +0000 (09:34 +0000)
committerjacquesguan <Jianjian.Guan@streamcomputing.com>
Fri, 15 Apr 2022 02:29:53 +0000 (02:29 +0000)
commit1aa4f0bb6cc21b7666718f5534c88d03152ddfb1
tree414c128670cd7ce2f3ecc964979cee67c3d1ebd5tree | snapshot
parentf4cc757560b8282bd321e1547f6e8a13722be2bccommit | diff
[RISCV][VP] Add RVV codegen for vp.trunc.

Differential Revision: https://reviews.llvm.org/D123579
llvm/lib/Target/RISCV/RISCVISelLowering.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVISelLowering.h diff | blob | history
llvm/test/CodeGen/RISCV/rvv/fixed-vector-trunc-vp-mask.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/fixed-vector-trunc-vp.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vtrunc-vp-mask.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll [new file with mode: 0644] blob
Domain: System / Toolchain;