mmc: sdhci-pci: Fix eMMC driver strength for BYT-based controllers
authorAdrian Hunter <adrian.hunter@intel.com>
Wed, 22 Apr 2020 11:16:29 +0000 (14:16 +0300)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 22 Apr 2020 15:57:17 +0000 (17:57 +0200)
commit1a8eb6b373c2af6533c13d1ea11f504e5010ed9a
tree01e0de0bcd7743bb94b111522b015cf1bc1b39aa
parentbb32e1987bc55ce1db400faf47d85891da3c9b9f
mmc: sdhci-pci: Fix eMMC driver strength for BYT-based controllers

BIOS writers have begun the practice of setting 40 ohm eMMC driver strength
even though the eMMC may not support it, on the assumption that the kernel
will validate the value against the eMMC (Extended CSD DRIVER_STRENGTH
[offset 197]) and revert to the default 50 ohm value if 40 ohm is invalid.

This is done to avoid changing the value for different boards.

Putting aside the merits of this approach, it is clear the eMMC's mask
of supported driver strengths is more reliable than the value provided
by BIOS. Add validation accordingly.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: 51ced59cc02e ("mmc: sdhci-pci: Use ACPI DSM to get driver strength for some Intel devices")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200422111629.4899-1-adrian.hunter@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-pci-core.c