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author	Sam Kolton <Sam.Kolton@amd.com>
	Mon, 15 May 2017 10:13:07 +0000 (10:13 +0000)
committer	Sam Kolton <Sam.Kolton@amd.com>
	Mon, 15 May 2017 10:13:07 +0000 (10:13 +0000)
commit	1a5a5e6a2aa5dc12a14f09d752525b951276c4fe
tree	9b826f042280e937115e0286232e8a29506364a9	tree \| snapshot
parent	049e7e07915033905afbe60bd66ed0634f842b16	commit \| diff

[TableGen] Add EncoderMethod to RegisterOperand

Reviewers: stoklund, grosbach, vpykhtin

Differential Revision: https://reviews.llvm.org/D32493

llvm-svn: 303044

llvm/include/llvm/Target/Target.td		diff \| blob \| history
llvm/test/TableGen/AsmVariant.td		diff \| blob \| history
llvm/test/TableGen/RegisterEncoder.td	[new file with mode: 0644]	blob
llvm/utils/TableGen/CodeGenInstruction.cpp		diff \| blob \| history

Domain: System / Toolchain;