freedreno/ir3: Validate our scheduling DAGs after construction.

freedreno/ir3: Validate our scheduling DAGs after construction.

This gives us some better explanation of a stack overflow in ir3_postsched
with shader-db:

IR3_SHADER_DEBUG=nouboopt ./run shaders/nexuiz/46.shader_test

DAG validation failed at:
  0x55f6570e8460: 0079:0107:002: 	_meta:collect r1.w (wrmask=0xff), r1.w, r2.x, r2.y, r2.z, r2.w, r3.x, r3.y, r3.z, false-deps:_[0098:0126:000:  mov.u32u32], _[0112:0143:000:  mov.u32u32], _[0087:0113:000:  mov.u32u32], _[0113:0144:000:  mov.u32u32], _[0099:0127:000:  mov.u32u32], _[0088:0114:000:  mov.u32u32]

Nodes in stack:
  0x55f657102050: 0079:0103:009: 	mov.u32u32 r1.w, r0.x, right=_[0080:0104:009:  mov.u32u32]

  0x55f6570e8460: 0079:0107:002: 	_meta:collect r1.w (wrmask=0xff), r1.w, r2.x, r2.y, r2.z, r2.w, r3.x, r3.y, r3.z, false-deps:_[0098:0126:000:  mov.u32u32], _[0112:0143:000:  mov.u32u32], _[0087:0113:000:  mov.u32u32], _[0113:0144:000:  mov.u32u32], _[0099:0127:000:  mov.u32u32], _[0088:0114:000:  mov.u32u32]

  0x55f657075f80: 0083:0108:007: 	samgq (f32)(xyz)r0.z (wrmask=0x7), r1.w (wrmask=0xff), s#3, t#3

  0x55f657051b60: 0104:0134:008: 	ldc.offset0 r3.x (wrmask=0xf), imm[0.000000,0,0x0], r9.w

  0x55f657103040: 0112:0143:000: 	mov.u32u32 r9.w, r0.x, right=_[0113:0144:000:  mov.u32u32]

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6656>