[AArch64][SVE] Improve codegen when extracting first lane of active lane mask
authorRosie Sumpter <rosie.sumpter@arm.com>
Mon, 9 May 2022 08:35:13 +0000 (09:35 +0100)
committerRosie Sumpter <rosie.sumpter@arm.com>
Mon, 9 May 2022 12:56:04 +0000 (13:56 +0100)
commit1a2665902f128155fa1febafea990ebaee9476f2
treeb32b1ecc7653356fe614dc7e20af7c2bd79bea61
parenta316a9815a4f4105bb96420e85e93fe5f0033ed0
[AArch64][SVE] Improve codegen when extracting first lane of active lane mask

When extracting the first lane of a predicate created using the
llvm.get.active.lane.mask intrinsic, it should give the same codegen as
when the predicate is created using the llvm.aarch64.sve.whilelo
intrinsic, since get.active.lane.mask is lowered to whilelo. This patch
ensures the codegen is the same by recognizing
llvm.get.active.lane.mask as a flag-setting operation in this case.

Differential Revision: https://reviews.llvm.org/D125215
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sve-cmp-folds.ll