drm/i915: Workaround VLV/CHV sprite1->sprite0 enable underrun
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 2 Mar 2017 17:15:03 +0000 (19:15 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 3 Mar 2017 14:50:10 +0000 (16:50 +0200)
commit1a10ae6ba8c3df4af9bcdb6f40348af71e72bd13
treeb0b578f47b2779b25d8a93873f4b3b6b2cf76cb7
parent602ae835505603eca8b50d813e00a56f56158434
drm/i915: Workaround VLV/CHV sprite1->sprite0 enable underrun

On VLV/CHV enabling sprite0 when sprite1 has already been enabled may
lead to an underrun. This only happens when sprite0 FIFO size is zero
prior to enabling it. Hence an effective workaround is to always
allocate at least one cacheline for sprite0 when sprite1 is active.

I've not observed this sort of failure during any other type of plane
enable/disable sequence.

v2: s/noninverted/raw/ for consistency with other platforms

Testcase: igt/kms_plane_blinker
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170302171508.1666-14-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/intel_pm.c