drm/i915: Add eDP support for Valleyview
authorGajanan Bhat <gajanan.bhat@intel.com>
Thu, 27 Sep 2012 13:43:07 +0000 (19:13 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 28 Sep 2012 15:04:38 +0000 (17:04 +0200)
commit19c03924d4b72eedff517f80edc6b33c14f0fe53
tree8b07b8854e7d848e878c06584f94ab74854853dc
parent2a8f64ca23447248efaf87c5c7c2cb0c5c3f27e8
drm/i915: Add eDP support for Valleyview

Eventhough Valleyview display block is derived from Cantiga, VLV
supports eDP. So, added eDP checks in i9xx_crtc_mode_set path.

v2: use different DPIO_DIVISOR values for VGA, DP and eDP
v3: fix DPIO value calculation to use same values for all display
interfaces
v4: removed unconditional enabling of 6bpc dithering based on comments
from Daniel & Jani Nikula. Also changed the display enabling order to
force eDP detection first.

Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com>
Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c