drm/i915: Fix wrong CDCLK adjustment changes
authorStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Mon, 1 Jun 2020 17:30:58 +0000 (20:30 +0300)
committerManasi Navare <manasi.d.navare@intel.com>
Thu, 4 Jun 2020 18:11:56 +0000 (11:11 -0700)
commit19aefbc778b8b8e87c2d31be9736c634f0ea95a8
tree2d5d29329515bde0864e2575fea7c1e8830c4385
parentb8226d62e77620d372f6eb8c34b51798f3962414
drm/i915: Fix wrong CDCLK adjustment changes

Previous patch didn't take into account all pipes
but only those in state, which could cause wrong
CDCLK conclcusions and calculations.
Also there was a severe issue with min_cdclk being
assigned to 0 every compare cycle.

Too bad this was found by me only after merge.
This could be also causing the issues in test, however
not clear - anyway marking this as fixing the
"Adjust CDCLK accordingly to our DBuf bw needs".

v2: - s/pipe/crtc->pipe/
    - save a bit of instructions by
      skipping inactive pipes, without
      getting 0 DBuf slice mask for it.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Fixes: cd1915460861 ("drm/i915: Adjust CDCLK accordingly to our DBuf bw needs")
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200601173058.5084-1-stanislav.lisovskiy@intel.com
drivers/gpu/drm/i915/display/intel_bw.c
drivers/gpu/drm/i915/display/intel_cdclk.c
drivers/gpu/drm/i915/display/intel_display.c