drm/i915: Treat SAGV block time 0 as SAGV disabled
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 9 Mar 2022 16:49:41 +0000 (18:49 +0200)
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>
Mon, 21 Mar 2022 11:47:52 +0000 (11:47 +0000)
commit1937f3feb0e84089ae4065e09c871b8ab4676f01
treedb9c89e953ad2015fd67fd78efaeeca063f69adc
parent9cddf03b2af07443bebdc73cba21acb360c079e8
drm/i915: Treat SAGV block time 0 as SAGV disabled

For modern platforms the spec explicitly states that a
SAGV block time of zero means that SAGV is not supported.
Let's extend that to all platforms. Supposedly there should
be no systems where this isn't true, and it'll allow us to:
- use the same code regardless of older vs. newer platform
- wm latencies already treat 0 as disabled, so this fits well
  with other related code
- make it a bit more clear when SAGV is used vs. not
- avoid overflows from adding U32_MAX with a u16 wm0 latency value
  which could cause us to miscalculate the SAGV watermarks on tgl+

Cc: stable@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220309164948.10671-2-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
(cherry picked from commit d8f5855b31c0523ea3b171db8dfb998830e8735d)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
drivers/gpu/drm/i915/intel_pm.c