target-i386: Rearrange processing of 0F 01
authorRichard Henderson <rth@twiddle.net>
Thu, 2 Jul 2015 12:59:21 +0000 (13:59 +0100)
committerRichard Henderson <rth@twiddle.net>
Fri, 12 Feb 2016 20:59:59 +0000 (07:59 +1100)
commit1906b2af7c2345037d9b2fdf484b457b5acd09d1
treeb4e76a7afac5260148905a04068df457dcf5a613
parent64dbaff09bb768dbbb13142862554f18ab642866
target-i386: Rearrange processing of 0F 01

Rather than nesting tests of OP, MOD, and RM, decode them
all at once with a switch.  Fixes incorrect decoding of
AMD Pacifica extensions (aka vmrun et al) via op==2 path.

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-i386/translate.c