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(parent: 3332b24) | patch
ARM: OMAP5: DRA7xx: support class 0 optimized voltages
authorNishanth Menon <nm@ti.com>
Thu, 30 May 2013 03:19:31 +0000 (03:19 +0000)
committerTom Rini <trini@ti.com>
Mon, 10 Jun 2013 12:43:10 +0000 (08:43 -0400)
commit18c9d55ac611784d161440bb9f127e372e132856
tree85e31364c96bdd69d1d582cf05d8b29da0d6cd84tree | snapshot
parent3332b244214d63dcf347fefb700fd71becb4b46ecommit | diff
ARM: OMAP5: DRA7xx: support class 0 optimized voltages

DRA752 now uses AVS Class 0 voltages which are voltages in efuse.

This means that we can now use the optimized voltages which are
stored as mV values in efuse and program PMIC accordingly.

This allows us to go with higher OPP as needed in the system without
the need for implementing complex AVS logic.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
arch/arm/cpu/armv7/omap-common/clocks-common.c diff | blob | history
arch/arm/cpu/armv7/omap5/hw_data.c diff | blob | history
arch/arm/include/asm/arch-omap5/clock.h diff | blob | history
arch/arm/include/asm/omap_common.h diff | blob | history
Domain: System / Kernel;