[X86][AVX] combineX86ShuffleChain - combine binary shuffles to X86ISD::VPERM2X128
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 10 Mar 2020 10:44:12 +0000 (10:44 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 10 Mar 2020 10:44:28 +0000 (10:44 +0000)
commit18c19441d10512e2b37ce829743443eed009147f
tree8bc94398bd279322d78bbfb4f013c3ef718979a7
parent20a3d64c8883c8be550f0759525b1550b7c2d35f
[X86][AVX] combineX86ShuffleChain - combine binary shuffles to X86ISD::VPERM2X128

For pre-AVX512 targets, combine binary shuffles to X86ISD::VPERM2X128 if possible. This mainly helps optimize the blend(extract_subvector(x,1),y) pattern.

At some point soon we're going to have make a decision about when to combine AVX512 shuffles more aggressively - we bail out if there is any change in element size (to protect predicate mask merging) which means we miss out on a lot of optimizations.
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/avg.ll
llvm/test/CodeGen/X86/masked_store_trunc.ll
llvm/test/CodeGen/X86/pr34592.ll
llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
llvm/test/CodeGen/X86/vector-trunc.ll