drm/amdgpu: Fix multi-level page table bugs for large BOs v3
authorFelix Kuehling <Felix.Kuehling@amd.com>
Wed, 29 Mar 2017 00:36:12 +0000 (20:36 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Mar 2017 03:55:53 +0000 (23:55 -0400)
commit1866bac8970522f2fb66bc2c2ed4b6e71c0830d3
tree409f9289a6cbbdf858362c6c1c45957cd2f11eb0
parent9ceaeeafbd1177e53395946a772a2a9c4c234887
drm/amdgpu: Fix multi-level page table bugs for large BOs v3

Fix the start/end address calculation for address ranges that span
multiple page directories in amdgpu_vm_alloc_levels.

Add error messages if page tables aren't found. Otherwise the page
table update would just fail silently.

v2:
 * Change WARN_ON to WARN_ON_ONCE
 * Move masking of high address bits to caller
 * Add range-check for "from" and "to"
v3:
 * Replace WARN_ON_ONCE in get_pt with pr_err in caller

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c