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arm64: silicon-errata.rst: Sort the Cortex-A55 entries
authorRob Herring <robh@kernel.org>
Wed, 29 Apr 2020 19:19:21 +0000 (14:19 -0500)
committerWill Deacon <will@kernel.org>
Wed, 29 Apr 2020 20:33:19 +0000 (21:33 +0100)
commit184dbc152e398d7136dabd59ed3f5c5521935712
tree130a1ded77827ca062bf4e271c16796eecdf124ftree | snapshot
parente24e03aa00f0248a716ec7859c03f0034bb42fb2commit | diff
arm64: silicon-errata.rst: Sort the Cortex-A55 entries

The Arm silicon errata list is mostly sorted by CPU name with the
exception of Cortex-A55, so let's sort it before adding more entries.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200429191921.32484-1-robh@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arm64/silicon-errata.rst diff | blob | history
Domain: System / Kernel;