[VP] Explicitly map from VP intrinsic to ISD opcode
authorFraser Cormack <fraser@codeplay.com>
Thu, 7 Apr 2022 16:58:59 +0000 (17:58 +0100)
committerFraser Cormack <fraser@codeplay.com>
Fri, 8 Apr 2022 11:30:22 +0000 (12:30 +0100)
commit18106b99f0c3076220e86123d1c19e0d38683b60
tree1dc6fe07d95d8396431a8c5469a117aa7da36a18
parentc8084fd9076aa20e3929e21bff11b2492c399a55
[VP] Explicitly map from VP intrinsic to ISD opcode

This patch aims to overcome an issue in these mappings where, when an ISD
node was registered with BEGIN_REGISTER_VP_SDNODE but outwidth the scope
of a pair of BEGIN_REGISTER_VP_INTRINSIC/END_REGISTER_VP_INTRINSIC
macros, the switch cases fell apart. This in particular happened with
VP_SETCC, where we'd end up with something along the lines of:

  case Intrinsic::vp_fcmp:
    break;
  case Intrinsic::vp_icmp:
    break;
    ResOpc = ISD::VP_SETCC;
  case Intrinsic::vp_store:
    ...

To remedy this, we introduce a special-purpose mapping macro which can
map any number of VP intrinsic opcodes to an ISD opcode.

As a result, we no longer need to special-case the mapping from vp.icmp
and vp.fcmp to VP_SETCC, as the new helper macro does it for us.

Thanks to @craig.topper for noticing this and to @rogfer01 for the idea.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D123324
llvm/include/llvm/IR/VPIntrinsics.def
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp