clk: exynos5250: register display block gate clocks to common clock framework
authorLeela Krishna Amudala <l.krishna@samsung.com>
Thu, 4 Apr 2013 06:44:40 +0000 (15:44 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Thu, 4 Apr 2013 06:51:23 +0000 (15:51 +0900)
commit17d4caccefd138c3e4970132c1db177024caf3c6
tree436fa4c042b48ed8fb9019eb3feeb8c49de4c970
parent6b5756e8bd19f8f1f23386d41997d0309e7a82a6
clk: exynos5250: register display block gate clocks to common clock framework

Add gate clocks for fimd, mie, dsim, dp, mixer and hdmi.
Register it to common clock framework.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Documentation/devicetree/bindings/clock/exynos5250-clock.txt
drivers/clk/samsung/clk-exynos5250.c