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(parent: d6ee400) | patch
drm/amd/powerplay: fix sw SMU wrong UVD/VCE powergate setting
authorEvan Quan <evan.quan@amd.com>
Fri, 17 May 2019 05:39:36 +0000 (13:39 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 24 May 2019 17:21:01 +0000 (12:21 -0500)
commit17a839135f7356d9e1cff653ea861b1b890c9d6c
tree5357bae47cc522ea82705eb8c97922b1c0bff181tree | snapshot
parentd6ee400e793f0ae6c9f5926bea9fbb362a950d96commit | diff
drm/amd/powerplay: fix sw SMU wrong UVD/VCE powergate setting

The UVD/VCE bits are set wrongly. This causes the UVD/VCE clocks
are not brought back correctly on needed.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/smu_v11_0.c diff | blob | history
Domain: System / Kernel;