clk: sunxi-ng: mux: Increase fixed pre-divider div size
authorChen-Yu Tsai <wens@csie.org>
Tue, 26 Jul 2016 07:04:25 +0000 (15:04 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 8 Aug 2016 18:03:20 +0000 (20:03 +0200)
commit178ca5312ad358fb129876bacbee8dac4681673a
tree3c179ffbc8f0e26e9bf6e757b85a0abdc85b364e
parent29b4817d4018df78086157ea3a55c1d9424a7cfc
clk: sunxi-ng: mux: Increase fixed pre-divider div size

Some clocks have a predivider value that is larger than what u8 can
store. One such example is the OUT clk found on A20/A31, which has
a /750 pre-divider on one of the osc24M parents.

Increase the size of the div field to u16.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu_mux.c
drivers/clk/sunxi-ng/ccu_mux.h