riscv: configs: defconfig: Enable Renesas RZ/Five SoC
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Fri, 28 Oct 2022 16:59:21 +0000 (17:59 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 10 Nov 2022 15:37:58 +0000 (16:37 +0100)
commit1776fca7fadbac2260a22e2ecb708e8a1ba9310d
treedca8904fba333b1839baf1205f4a90a32340d42a
parent9abf2313adc1ca1b6180c508c25f22f9395cc780
riscv: configs: defconfig: Enable Renesas RZ/Five SoC

Enable Renesas RZ/Five SoC config in defconfig. It allows the default
upstream kernel to boot on RZ/Five SMARC EVK board.

Alongside enable SERIAL_SH_SCI config so that the serial driver used by
RZ/Five SoC is built-in.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20221028165921.94487-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/riscv/configs/defconfig