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(parent: 0094f04) | patch
drm/amd/display: correctly populate dcn315 clock table
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Thu, 20 Oct 2022 15:46:35 +0000 (11:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 24 Oct 2022 18:35:46 +0000 (14:35 -0400)
commit174fc82410a8c75d3937320658fca5a240ca8176
tree6da93cd4e73b5735663756f845618d07fa0de366tree | snapshot
parent0094f042f2f88f6e0fea01f0753773a95cc975bdcommit | diff
drm/amd/display: correctly populate dcn315 clock table

Fix incorrect pstate read order as well as min and max state logic.

Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c diff | blob | history
Domain: System / Kernel;