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(parent: 463f50b) | patch
[AMDGPU][IGLP] Parameterize the SchedGroup processing / linking order in Solver
authorJeffrey Byrnes <Jeffrey.Byrnes@amd.com>
Thu, 27 Apr 2023 21:43:32 +0000 (14:43 -0700)
committerJeffrey Byrnes <Jeffrey.Byrnes@amd.com>
Tue, 30 May 2023 21:43:14 +0000 (14:43 -0700)
commit1721e72d6e6d0c18ac36155b1f89fd81f45994db
treedab5cb9c6bcc9d1ea896d780454df6e4efdc007atree | snapshot
parent463f50b436a2ac3000a90d273f2ed05893e8864fcommit | diff
[AMDGPU][IGLP] Parameterize the SchedGroup processing / linking order in Solver

Currently the PipelineSolver processes SchedGroups in bottom up manner. However, there is no compelling reason to require this. Providing the option to toggle this affords greater experimentation capability, and make usage a bit more intuitive. Importantly, it makes designing rules much easier.

Differential Revision: https://reviews.llvm.org/D149393

Change-Id: Ic4abd3408f9faa105c0eef72eab7873d46083ee4
llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp diff | blob | history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll diff | blob | history
Domain: System / Toolchain;