drm/amd/display: properly turn off unused mpc before front end programming
authorEric Yang <Eric.Yang2@amd.com>
Mon, 17 Jul 2017 14:22:05 +0000 (10:22 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 22:15:14 +0000 (18:15 -0400)
commit1674d35bf57b0546577b87af266e45de3ccf45c0
treee7607204620833582d13f0eecc4f16e66ec193b4
parent83572340097012c91de3f96e52797491c79cfe43
drm/amd/display: properly turn off unused mpc before front end programming

MPCC_OPP_ID must be programmed to 0xf to properly turn off the mpcc.
However the software state of the mpcc must keep track of the opp that
the mpcc is attached to for reset to properly happen. This is kinda
hacky right now, but a good solution may involve a lot of work.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c