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[mlir][Transform] Add support for mma.sync m16n8k16 f16 rewrite.
authorNicolas Vasilache <nicolasvasilache@users.noreply.github.com>
Wed, 21 Jun 2023 14:35:30 +0000 (14:35 +0000)
committerNicolas Vasilache <nicolasvasilache@users.noreply.github.com>
Mon, 26 Jun 2023 16:46:42 +0000 (16:46 +0000)
commit1660f2174d59bc2fd04131dab9ab0b43178bf665
tree34906b1a6c562655423ddb88a3730943befe2a4atree | snapshot
parentb3272f5ddbfd2b4a3219df223392af7a09571cc1commit | diff
[mlir][Transform] Add support for mma.sync m16n8k16 f16 rewrite.

This PR adds support for the m16n8k16 f16 case.
At this point, the support is mostly mechanical and could be Tablegen'd to all cases.
Until then, this can be populated as needed on a case-by-case basis.

Depends on: D153420

Differential Revision: https://reviews.llvm.org/D153428
mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp diff | blob | history
mlir/test/Dialect/NVGPU/transform-matmul-to-nvvm.mlir diff | blob | history
mlir/test/Integration/GPU/CUDA/TensorCore/transform-mma-sync-matmul-f16-f16-accum.mlir [new file with mode: 0644] blob
Domain: System / Toolchain;